Questions for: Msi Logic Circuits
The data transmission system shown in below has a problem; the parity error output is always high. A logic analyzer is used to examine the system and shows that the DATA IN on the left matches the DATA OUT on right. What might be causing the problem?

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Which statement best describes the given figure, and what is the function of the terminal labeled EN?

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It is suspected that the comparator in the figure given below has a problem. The inputs are activated in the table shown below and the corresponding outputs noted. What is most likely wrong with the circuit?
For P0 – P3 = 1 and Q0 – Q3 = 0, P > Q = 1, P = Q = 1, P < Q = 0
For P0 – P3 = 0 and Q0 – Q3 = 1, P > Q = 0, P = Q = 1, P < Q = 1
For P0 – P3 = 1 and Q0 – Q3 = 1, P > Q = 0, P = Q = 1, P < Q = 0

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For the input values (A0–A3, B0–B3, Data Select = 1) given for the circuit given below, what will be indicated on the displays?

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