Flip Flops And Timers

If an input is activated by a signal transition, it is _____________.

A:

edge-triggered

B:

toggle-triggered

C:

clock-triggered

D:

noise-triggered

Answer: A

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The toggle condition in a master-slave J-K flip-flop means that Q and

will switch to their ________ state(s) at the _____________________.

A:

inverted, positive clock edge

B:

quiescent, negative clock edge

C:

opposite, active clock edge

D:

reset, synchronous clock edge

Answer: C

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One example of the use of an S-R flip-flop is as a(n) _________.

A:

racer

B:

binary storage register

C:

astable oscillator

D:

transition pulse generator

Answer: B

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For an S-R flip-flop to be SET or RESET, the respective input must be __________.

A:

LOW

B:

HIGH

C:

installed with steering diodes

D:

in parallel with a limiting resistor

Answer: B

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Pulse-triggered flip-flops are also called _________ flip-flops.

A:

master-slave

B:

postponed

C:

level

D:

edge

Answer: A

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Questions for: Flip Flops And Timers