Exercise: Counters

Questions for: Counters

The circuit shown below is used for ________, and for the inputs shown, the DATA output will be ________.

A:
multiplexing, 1
B:
parallel-to-serial conversion, 0
C:
demultiplexing, 0
D:
parallel-to-serial conversion, HIGH
Answer: B
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In order to check the CLR function of a counter, ________.
A:
apply the active level to the CLR input and check all of the Q outputs to see if they are all in their reset state
B:
ground the CLR input and check to be sure that all of the Q outputs are LOW
C:
connect the CLR input to Vcc and check to see if all of the Q outputs are HIGH
D:
connect the CLR to its correct active level while clocking the counter; check to make sure that all of the Q outputs are toggling
Answer: A
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In order to use a shift register as a counter, ________.
A:
the register's serial input is the counter input and the serial output is the counter output
B:
the parallel inputs provide the input signal and the output signal is taken from the serial data output
C:
serial in/serial out register must be used
D:
the serial output of the register is connected back to the serial input of the register
Answer: D
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Assume a 4-bit ripple counter has a failure in the second flip-flop such that it "locks up." The third and fourth stages will ________.
A:
continue to count with correct outputs
B:
continue to count but have incorrect outputs
C:
stop counting
D:
turn into molten silicon
Answer: C
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Referring to the function table given below, taking the CLEAR, S1, and S0 inputs all HIGH ________.

A:
will inhibit the operation of the register
B:
will reset the parallel registers and inhibit the serial data inputs
C:
will cause the parallel data inputs to be loaded and passed to the parallel data outputs
D:
will depend on what values are loaded into the parallel data inputs
Answer: C
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