Exercise: Programmable Logic Device

Questions for: Programmable Logic Device

The SPLD classification includes the ________ PLD devices.
A:
earliest
B:
smallest
C:
largest
D:
newest
Answer: A
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In a programmable logic device circuit diagram, the inputs to each of the OR gates are designated by ________.
A:
a dot
B:
a bus
C:
a single line
D:
4 inputs
Answer: C
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In a GAL16V8, the D flip-flops contained in the OLMCs have ________ and ________.
A:
asynchronous reset, synchronous preset
B:
asynchronous preset, synchronous reset
C:
asynchronous clear, synchronous set
D:
asynchronous set, synchronous clear
Answer: A
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The GAL16V8 has architecture that is very similar to the ________ device.
A:
PAL
B:
PROM
C:
PLD
D:
SPLD
Answer: A
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The field programmable logic array was the first ________ programmable logic device.
A:
understandable
B:
logic array
C:
multifunction
D:
nonmemory
Answer: D
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