Exercise: Integrated Circuit Logic Families

Questions for: Integrated Circuit Logic Families

The output stage of a TTL gate is a special design called ________.
A:
multiemitter
B:
totem-pole
C:
MSI
D:
DIP
Answer: B
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P-MOS and N-MOS ________.
A:
represent MOSFET devices utilizing either P-channel or N-channel devices exclusively within a given gate
B:
are enhancement-type CMOS devices used to produce a series of high-speed logic known as 74HC
C:
represent positive and negative MOS-type devices that can be operated from differential power supplies and are compatible with operational amplifiers
D:
None of the above are.
Answer: A
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________ is about twice as fast as P-MOS.
A:
CMOS
B:
DMOS
C:
MOD
D:
N-MOS
Answer: D
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In a DIP the spacing between pins is typically ________.
A:
5 mils
B:
10 mils
C:
50 mils
D:
100 mils
Answer: D
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The 74F-Fast TTL integrated-circuit fabrication technique uses reduced interdevice ________ to achieve reduced propagation delays.
A:
noise
B:
resistance
C:
capacitance
D:
inductance
Answer: C
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