Exercise: Integrated Circuit Logic Families

Questions for: Integrated Circuit Logic Families

What does ECL stand for?
A:
It stands for electron-coupled logic; all of the devices used within the gates are N-type transistors.
B:
It stands for emitter-coupled logic; all of the inputs are coupled into the device through the emitters of the input transistors.
C:
It stands for emitter-coupled logic; all of the emitters of the input transistors are connected together and each transistor functions as an emitter follower.
D:
It stands for energy-coupled logic; the input energy is amplified by the input transistors and allows the device to deliver higher output currents.
Answer: C
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A logic signal experiences a delay in going through a circuit. The two propagation delay times are defined as:
A:
tPLH and tPHL.
B:
tDLH and tDHL.
C:
tHPL and tlph.
D:
tLDH and tHDL.
Answer: A
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What is the increase in switching speed between 74LS series TTL and 74HC/HCT (High-Speed CMOS)?
A:
5
B:
10
C:
50
D:
100
Answer: B
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What type of circuit is shown below and which statement best describes its operation?

A:
It is a two-input CMOS AND gate with open drain.
B:
It is a two-input CMOS buffer with tristate output.
C:
It is a CMOS inverter with tristate output.
D:
It is a hybrid TTL-CMOS inverter with FET totem-pole output.
Answer: C
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Whenever a totem-pole TTL output goes from LOW to HIGH, a high-amplitude current spike is drawn from the Vcc supply. How is this effect corrected to a digital circuit?
A:
By connecting a radio-frequency capacitor from Vcc to ground.
B:
By using a switching power supply
C:
By connecting a capacitor from Vout to ground
D:
By connecting a large resistor from Vcc to Vout
Answer: A
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