Exercise: Digital System Projects Using Hdl

Questions for: Digital System Projects Using Hdl

In the frequency counter, the length of time for the ________ to be enabled can be selected with the range select input.
A:
display register
B:
frequency prescaler
C:
BCD counter
D:
signal generator
Answer: C
No answer description is available. Let's discuss.
Using one case construct inside another is known as ________.
A:
doping
B:
functioning
C:
freezing
D:
nesting
Answer: D
No answer description is available. Let's discuss.
In the frequency counter, the control clock is derived from the ________ by frequency dividers controlled in the control and timing block.
A:
BCD counters
B:
system clock signal
C:
display register
D:
decoder/display
Answer: B
No answer description is available. Let's discuss.
In the digital clock project, when it is 11:59:59, AND gate 1 detects that the tens of hours is 1 and the enable input is active. On the next clock pulse the AM/PM flip-flop will ________.
A:
set
B:
reset
C:
toggle
D:
clear
Answer: C
No answer description is available. Let's discuss.
In the keypad encoder, the ring counter is implemented using ________ that responds to the clk input.
A:
SIGNAL
B:
FUNCTION
C:
CASE
D:
PROCESS
Answer: D
No answer description is available. Let's discuss.
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