Exercise: Digital Electronics

Questions for: Digital Electronics

A 6 MHz channel is used by a digital signalling system initializing four-level signals. The maximum possible transmission rate is
A:
6M bands/s
B:
12M bands/s
C:
6 M bits/s
D:
12M bits/s
Answer: A
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Assertion (A): A 4 input variable logic circuit can be implemented using a 8 : 1 multiplexer.

Reason (R): When a multiplexer is used as a logic function generator, the logic design is simple.

A:
Both A and R are correct and R is correct explanation of A
B:
Both A and R are correct but R is not correct explanation of A
C:
A is true, R is false
D:
A is false, R is true
Answer: B
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In a 4 bit parallel in parallel out shift register A = 1, B = 1, C = 0, D = 1. The data output after 3 clock pulses is
A:
1101
B:
1001
C:
0101
D:
0001
Answer: A
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A JK flip flop can be converted to D flip flop by
A:
Connecting both J and K terminals to D
B:
Connecting J terminal to D and leaving K open
C:
Connecting K terminal to D and leaving J open
D:
Connecting J terminal to D and K terminal to D through an inverter
Answer: D
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The product of which of the following gives the figure of merit of a logic family?
A:
Gain and bandwidth
B:
Propagation delay time and power dissipation
C:
Fan-out and propagation delay time
D:
Noise margin and power dissipation
Answer: B
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