23 = 8 and 24 = 16. Hence minimum of 4 memory elements.
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Assertion (A): The propagation delay in ECL is minimum
Reason (R): Transistors used in ECL switch between active and cutoff regions.
Since saturation is avoided switching speed is high.
E7 F6 in hexadecimal = 14 x 163 + 7 x 162 + 15 x 16 + 6 = 59382 in decimal.
2 x 10 = 20.
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